The generic reconfigurable resources in an FPGA can be programmed to execute a wide variety of applications at mutually exclusive times. Consequently, FPGAs are unsuitable for applications requiring high volume production, high performance or low power consumption. This book presents a new exploration environment for mesh-based, heterogeneous FPGA architectures.
- Application Specific Mesh Based Heterogeneous Fpga Architectures Parvez Husain Mehrez Habib.
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- Application-Specific Mesh-based Heterogeneous FPGA Architectures!
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- Application-Specific Mesh-based Heterogeneous FPGA Architectures | Husain Parvez | Springer.
It describes state-of-the-art techniques for reducing area requirements in FPGA architectures, which also increase performance and enable reduction in power required. Springer Professional.
Back to the search result list. Table of Contents Frontmatter 1.
Introduction Abstract. A software CAD flow transforms a hardware application to a programming bitstream, which can easily be and instantly programmed on an FPGA. This re-programmability of an FPGA device can be used to execute different hardware applications at mutually exclusive times. An FPGA also allows partial re-configuration i.
Partial re-configuration is useful in designing systems which require to adapt frequently according to run-time constraints. Compared to alternate technologies that fabri- cate specific application circuits on silicon, FPGA-based applications have less non recurring engineering NRE cost and shorter time-to-market.
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- Tree Based Heterogeneous FPGA Architectures, Application Specific Exploration and Optimization.
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These advantages make FPGA-based products very effective and economical for low to medium volume production. For varying requirements, a Unlike other technologies, which implement hardware directly into silicon, any errors in the final FPGA-based product can be easily corrected by simply reprogramming the FPGA.
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Any future updates in the final product can also be easily upgraded by simply downloading a new application bitstream. The main theme of this work is to improve the area of FPGAs. For this purpose, a detailed exploration and optimization of two FPGA architectures is performed: one is the well known mesh-based FPGA architecture while other is tree-based architecture that remains relatively unexplored despite its better performance and routing predictability.
Further, a detailed comparison between the two architectures is also presented to highlight their respective advantages and disadvantages. The exploration and optimization of two architectures start with the introduction of heterogeneous hard-blocks in both architectures.
Application-Specific Mesh-based Heterogeneous FPGA Architectures
In this work, first we present a new environment for exploration of tree-based heterogeneous FPGA architecture. This environment is flexible in nature and allows to explore different architecture techniques with varying types of hard-blocks. Further, in this work, we present an exploration environment for mesh-based heterogeneous FPGA architecture.